`include "FullAddr.v"
module FullAddr_tb;
    reg a, b, cin;
    wire sum, cout;
    FullAddr fullAddr1(a, b, cin, sum, cout);

    initial begin
        a = 0;
        b = 0;
        cin = 0;
    end
    initial begin
        $monitor("a = %b, b = %b, cin = %b, sum = %b, cout = %b", a, b, cin, sum, cout);
    end
    initial begin
        #10 a = 1;
        #10 b = 1;
        #10 cin = 1;
        #10 a = 0;
        #10 b = 1;
        #10 cin = 1;
    end
endmodule       